% subckt of dspoutfpga             the VME bus output port %

SUBDESIGN  TVMEOUT1   %unstack 32 bit data to 4 consecutive byte to vme%
                     %modified to seperate reading of control reg and status, 4/3/00% 

                 (CP,           % the local 40 mhz clock         %
                  DI[31..0],    % the 32 bit data for VME        %
                  BUFRDY,       % the buffer has >0 words        %
                  SERRDY,       % the DSPxmt has data   %
                  
                  CS,           % VME PU select                  %
                  R/W,          % VME read/write                 %
                  ADD[3..0]     % VME address                    %
                  :INPUT;
                  SELCNTL,      %READ THE CONTROL REGISTER       %  %NEW%
                  SELSTAT,      % read the status word           %
                  SELBUF,       % read the expansion port buffer %
                  RDBUF,        % read strobe to expan-port buffer%
                  SELSERR,      % reads data from the DSP serxmt  %
                  RSTSERR,      % resets SERRdy flags after read  %
                  
                  DSO,          % data strobe to VME             %
                  RDY,          % pu ready to VME                %
                  DAT[7..0]     % output data byte to VME        %
                  :OUTPUT;)
                  
         VARIABLE
                  BSY              :LCELL ;
                  READ             :DFF   ; % on for whole read period%
                  SYNC[4..1]       :DFF   ; %TO GENERATE READ STROBE%
                  VMEOUT[7..0]     :TRI   ;
                  RDEL[1..1]       :DFF   ; % DELAY READ TO 1 %%AND 2%% CYCLES%
                  TOG              :DFF   ; %used to generate /DS to vme%
                  BYT[1..0]        :DFFE  ; %data byte read sequential control%
                  QRST[2..1]       :DFF   ; %used to generate RSTSERR%
                  
          BEGIN 
                 
               % select the addressed port : %
                 SELCNTL = CS & R/W & (ADD[]==0) ;       %NEW, 4/3/00%
                 SELSTAT = CS & R/W & (ADD[]==6) ;
                 SELBUF  = CS & R/W & (ADD[]==7) ;
                 SELSERR = CS & R/W & (ADD[]==8) ;
                 
              % send RDY to VME when the addressed port is ready: %
                 BSY   = (READ # RDEL1.Q) & (SELCNTL # SELSTAT # SELSERR # SELBUF);
                 RDY     = !BSY ;
                 
               % read the addressed port when ready: % 
                 SYNC[].CLK   = CP         ;
                 SYNC[].CLRN  = CS         ;
                 SYNC1.D      =  SELSERR # SELBUF & BUFRDY # SELSTAT # SELCNTL;
                 SYNC[4..2].D = SYNC[3..1] ;
                 
             
                 READ.CLRN = CS             ; 
                 READ.CLK  = CP             ;
                % READ.D    = !BSY & SYNC[3] & !SYNC[4] & 
                            (SERRDY & (ADD[]==8) # BUFRDY & (ADD[]==7) # (ADD[]==6))
                             # READ  &  !(BYT[]==3)    ;%
                  READ.D    = !BSY & SYNC[3] & !SYNC[4] # READ  &  !(BYT[]==3);
                  RDBUF = READ & !RDEL1 & BUFRDY & SELBUF ;
                 
               % send the 4 data bytes to VME: % 
                                               
                 RDEL[].CLK   = CP        ; 
                 RDEL[].CLRN  = CS        ;
                 RDEL1.D      = READ      ;
                % RDEL2.D      = RDEL1.Q     ;%

                  
                             
                 TOG.CLRN = CS          ;           
                 TOG.CLK  = CP          ;
                 TOG.D    = !TOG & RDEL1;
                 
                 BYT[].CLRN    = BSY ;
                 BYT[].CLK     = CP        ;
                 BYT[].ENA     = TOG       ;
                 IF   RDEL1 
                 THEN  BYT[].D = BYT[] + 1 ;
                 ELSE  BYT[].D = BYT[].Q   ;
                 END IF ;
                 
              % the data to VME:  HIGHEST BYTE GO OUT FIRST%
                 VMEOUT[].OE = CS & R/W & BSY          ;
                 VMEOUT[].in = DI[7..0]   & (BYT[]==3) ;
                 VMEOUT[].in = DI[15..8]  & (BYT[]==2) ;
                 VMEOUT[].in = DI[23..16] & (BYT[]==1) ;
                 VMEOUT[].in = DI[31..24] & (BYT[]==0) ;
                 
                 DAT[] = VMEOUT[].out ;
                 DSO   = TOG          ;
                 
              % reset the SERR port flags after readout: %
                 QRST[].CLK = CP                      ;
                 QRST1.D    = SELSERR & (BYT[]==3) ;
                 QRST2.D    = QRST1                   ;
                                  
                 
                 RSTSERR    = QRST2 ;
                 
                 END ;