#include <stdio.h>
#include <fcntl.h>
#include <sys/types.h>
#include <unistd.h>
#include <assert.h>

#include "ti_dsp.h"

#include "ROD.h"
#define RODID 1

rod_t *pROD; /* defined in ROD.h and used here and in ti_vme_gva.c */

/* Default slot, geographical address, and VME mode */
static int slot=4, mode=2, gaddr=11, iopt=1 ;

/* ----------------------------------------------------------------------
   Usage: mV10 <PU slot> <mode> <VME geographical address>
   ---------------------------------------------------------------------- */
main(int argc, char** argv)
{
  /* The PU descriptor(s) for one ROD */
  ti_dsp_t dsp[4];
  int npu = 4;
  int i;

  unsigned int ist;

  const static char* bootFile = "evtloop_copy.x0";
  const static char* calibrationFile = NULL;

  if (argc > 1) slot  = atoi(argv[1]);
  if (argc > 2) mode  = atoi(argv[2]);
  if (argc > 3) gaddr = atoi(argv[3]);
  if (argc > 4) iopt  = atoi(argv[4]);

  for(i=0; i<npu; i++){
    dsp[i].rodid = RODID;
    dsp[i].nsamp = 5;
    dsp[i].ngain = 1;
    dsp[i].bootFile = bootFile;
    dsp[i].calibrationFile = calibrationFile;
  }
  dsp[0].puid  = 4; /* Slot */
  dsp[1].puid  = 3;
  dsp[2].puid  = 2;
  dsp[3].puid  = 1;


  {
    extern RODDBG *p_RODDBG;
    p_RODDBG->vme  = 0;
    p_RODDBG->loc  = 0;
    p_RODDBG->misc = 0;
    p_RODDBG->util = 0;
    p_RODDBG->pu   = 0;
    p_RODDBG->ttc  = 1;
    p_RODDBG->oc   = 1;
  }


  {
    crate_t *aCrate = ROD_CrateInit(1,0);
    assert (aCrate != NULL);
    pROD = aCrate->rod[0];
  }

  ist = ROD_ModuleInit(pROD, gaddr, RODID);
  assert (ist == 0);

  /* Configure PUs (what is this for) */
  ist = ROD_PModule(pROD);

  /* Configure mother board components */
  ist = ROD_GeneralReset(pROD);
  ist = ROD_TtcConfig(pROD, mode);


  /* === Boot the TI processing unit(s) one by one === */
  for(i=0; i<npu; i++){
    ti_boot(dsp+i, TI_AUTO);
    sleep(1);
  }

 
  /* === Configure the Output Controller */
  ROD_OcResetGen(pROD);            /* general reset */


  /* === Mask all PUs except those specified by slot */
  {
    unsigned int reg = 0x4ffffff;
    for(i=0; i<npu; i++)
      reg ^= (1 << 15+dsp[i].puid);
    ROD_OcConfig(pROD, reg);

    ROD_OcRConfig(pROD, &ist);
    printf("ROD OC Config Register = 0x%08x\n", ist);
  }

  ROD_OcStatus(pROD, &ist);
  ROD_OcPStatus(ist);
  ROD_OcResetEOE(pROD);            /* reset EOE flag */

  while(1){
    sleep(1);

    /* Lets see what we got */
    for(i=0; i<npu; i++)
      ti_fpsstatus(dsp+i);

    /* Output Controller Status */
    ROD_OcStatus(pROD, &ist);
    ROD_OcPStatus(ist);
    usleep(1000);

    if (rdoc_smemsize(ist) == 0) continue;

    puts("ROD_OcReadRAM() is next.");

    {
      FILE *fd;
      int nw;
      unsigned int *data;
      ist = ROD_OcReadRAM(pROD, &nw, &data, iopt);
      if (ist != SUCCESS) printf("ROD_OcReadRAM() returned %d\n", ist);
      printf("After ROD_OcReadRAM: Read %d words\n", nw);
      fd = fopen("OCdump.dat", "ab");
      fwrite(data, sizeof(int), nw, fd);
      fclose(fd);
      free(data);
    }
    ROD_OcStatus(pROD, &ist);
    ROD_OcPStatus(ist);
    ROD_OcResetEOE(pROD);


    /* Lets see what we got */
    usleep(25000);
    for(i=0; i<npu; i++){
      ist = ti_status(dsp+i);
      if (ist & TI_STATUS_NEVT)
	printf("Error, there should not be any event in the FIFO, pu=%d", i);
    }
  }

  /* === DSP power-down === */
  puts("DSP power down");
  for(i=0; i<npu; i++){
    ti_syscall(dsp+i, 2);
    sleep(1);
  }

  ROD_End(pROD);
}