SUBROUTINE FPGA_MAP(NSAMP,NGAIN,MAP)
C----------------------------------------------------------------------
C     Simple program to prepare the lookup table, which is loaded
C     into the input FPGA and used for data rearrangement.
C
C     The macros below follow the naming convention of the note
C     ATL-AL-LAL-ES-1.0 describing the FEB data format. In addition,
C     if more than one gain is read out, ADC1 and GAIN always refer
C     to the first gain.
C
C     The arguments of these macros are:
C     I [0..3] the adc pair number. There are 64 channels in total.
C     ISAMP [0..NSAMP-1] the sample number. There are NSAMP samples.
C     ICH [0..31] the channel pair number.
C     Since channels ICH and ICH+32 are packed together to form
C     a 32-bit word, you only specify one location for the pair.
C----------------------------------------------------------------------
      IMPLICIT INTEGER (A-Z)
      DIMENSION MAP(0:511)
      PARAMETER(LUN=22)
C--   some macros to help with initial phase addressing
      CTL1(I)=I
      CTL2(I)=I+8
      ADDR(I,ISAMP)=I+16+ISAMP*(1+8*NGAIN)*8
      CTL3(I)=ADDR(I,NSAMP)
      ADC1(ICH,ISAMP)=ADDR(ISHFT(ICH,-3),ISAMP)+ISHFT(1+IAND(ICH,7),3)
      GAIN(I,ISAMP)=ADDR(I,ISAMP)+68
      TTC_DATA=20+NSAMP*(1+8*NGAIN)*8 ! or CTL3(0)+4
      ERR_FLAG=21+NSAMP*(1+8*NGAIN)*8 ! or CTL3(0)+5
C
      OPEN(LUN, STATUS='SCRATCH')
C========================================
C     Put your code below
C========================================
      WRITE(LUN,'(I6)')
     $     GAIN(0,0), ((ADC1(i,isamp),isamp=0,NSAMP-1),i=0,7),
     $     GAIN(1,0), ((ADC1(i,isamp),isamp=0,NSAMP-1),i=8,15),
     $     GAIN(2,0), ((ADC1(i,isamp),isamp=0,NSAMP-1),i=16,23),
     $     GAIN(3,0), ((ADC1(i,isamp),isamp=0,NSAMP-1),i=24,31),
     $     (ADDR(0,isamp),isamp=0,NSAMP-1),
     $     CTL1(0),CTL2(0),CTL3(0),ERR_FLAG
C
C--   Do not modify anything below this line
      REWIND(LUN)
      NW = 256                  ! Bit 8 must be set in order to write the words
 10   READ(LUN,*,END=20) IADDR
      IF (IADDR.GE.512.OR.NW.GE.512) STOP 'fpga_map overflow'
      MAP(IADDR) = NW
      NW = NW + 1
      GOTO 10
 20   CLOSE(LUN)
      END