nbit	.set	B2		; Circular addressing
src	.set	A3
dst	.set	B3
One	.set	B4

	.include	"otherRegisters"

	LDW	*src++, x0
||	SUB	nbit, msb, nbit
||	CMPLT	nbit, msb, A1
||	SHL	lsb, nbit, B1:B0
|| [A1]	STW	Ovalue, *dst++

   [A1]	ADDK	32, nbit
||	AND	x0, mask, lsb
|| [B1]	ZERO	Ovalue
|| [B1]	ADD	Ovalue, B1, Ov_out	; OR replaced by ADD

	SUBAB	nbit, k1, nbit
||	ADD	msk0, lsb, lsb		; OR replaced by ADD
||	ADD	Ovalue, B0, Ovalue	; OR replaced by ADD
||	SHRU	x0, k, msb
|| [B1]	STW	Ov_out, *dst++
|| [A1]	MPY	0, Ovalue, Ovalue
;||	SHL	One, k1, msk0	; transition only